1. Field of the Invention
The present invention relates to a method of forming a thin film transistor, and more particularly to a method of forming a thin film transistor with a tilt channel of parallel needlelike polysilicon formed by electroless plating or chemical displacement metal induced crystallization.
2. Description of the Related Art
The demand for smaller electronic consumer products with higher resolution displays, spurs continued research and development in the area of liquid crystal displays (LCDs). The size of LCDs can be controlled by incorporating the large-scale integration (LSI) and very large scale integration (VLSI) driver circuits, presently on the periphery of LCDs, into the LCD itself. The elimination of externally located driving circuits and transistors will reduce product size, process complexity, a number of process steps, and ultimately the price of the product in which the LCD is mounted.
The primary component of the LCD, and the component that must be enhanced for further LCD improvements to occur, is the thin-film transistor (TFT). TFTs are typically fabricated on a transparent substrate such as quartz, glass, or even plastic. TFTs are almost exclusively used as switches to allow the various pixels of the LCD to be charged in response to the driver circuits. TFT performance will be improved, and driver circuit functions incorporated into TFTs, by increasing the electron mobility in the TFT devices. Increasing the electron mobility of a transistor results in a transistor having faster switching speeds. Improved TFTs having increased electron mobility yield controllable LCD screens, lower power consumption, and faster transistor response times. Further LCD resolution enhancements will require that the TFTs mounted on the transparent substrates have electron mobility characteristics rivaling IC driver circuits currently mounted along the edges of the screen. That is, display and driver TFT located across the entire display must operate at substantially the same level of performance.
The carrier mobility of typical thin-film transistors, with active areas formed from amorphous film, is poor, on the order of 0.1 to 0.2 cm2/Vs. Carrier mobility is improved by using crystallized silicon. Single crystal silicon transistors, which are usually used in TFT driver circuits, have electron mobilities on the order of 500 to 700 cm2/Vs. Polycrystalline silicon transistor performance is between the two extremes, having mobilities on the order of 10 to 400 cm2/Vs. Thin-film transistors having mobilities greater than 100 cm2/Vs would probably be useful in replacing LCD periphery mounted driver circuitry. However, it has been difficult to produce polycrystalline TFTs with electron mobilities of even 40 to 50 cm2/Vs.
Single crystal silicon films, for use with LCDs, are difficult to fabricate when adhered to relatively fragile transparent substrates. A quartz substrate is able to withstand high process temperatures, but it is expensive. Glass is inexpensive, but is easily deformed when exposed to temperatures above 600xc2x0 C. for substantial lengths of time. Even the fabrication of polycrystalline silicon transistors has been very difficult due to the necessity of using low temperature crystalline processes when glass is involved.
In view of the drawbacks mentioned with the prior art process, there is a continued need to develop new and improved processes that overcome the disadvantages associated with prior art processes. The advantages of this invention are that it solves the problems mentioned above.
It is therefore an object of the invention to provide a method of forming thin-film transistors with high electron mobility.
It is another object of this invention to provide a low-cost and simple method of forming thin-film transistors.
It is another object of this invention to provide a thin-film transistors with lower power consumption and faster transistor response times.
To achieve these objects, and in accordance with the purpose of the invention, the invention uses a method for forming a thin film transistor comprising the following steps. First of all, a substrate having an amorphous silicon layer thereon is provided. Secondly, the amorphous silicon is patterned to form an active region pattern having a source region pattern, a drain region pattern and a tilt channel pattern. Thirdly, a metal electroless plating or chemical displacement processes are performed over the active region pattern to form metal clusters adjacent the sidewall of the active region pattern. Finally, a metal induced lateral crystallization process is performed on the active region pattern to crystallize the active region pattern of amorphous silicon to form an active region of polysilicon having a source region, a drain region and a tilt channel, wherein the metal clusters adjacent the sidewall of the tilt channel pattern induce formations of parallel polysilicon grains and render the grain orientation of polysilicon in the tilt channel perpendicular to a gate electrode which is subsequently formed above the tilt channel.
It is to be understood that both the foregoing general description and the following detailed description are exemplary and explanatory only and are not restrictive of the invention, as claimed.